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  • 匿名
关注:1 2013-05-23 12:21

求翻译:FPGA时钟频率高,内部延时小;全部控制逻辑由纯硬件电路完成,不存在运行软件过程中许多固有的缺陷,速度快,效率高。是什么意思?

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FPGA时钟频率高,内部延时小;全部控制逻辑由纯硬件电路完成,不存在运行软件过程中许多固有的缺陷,速度快,效率高。
问题补充:

  • 匿名
2013-05-23 12:21:38
FPGA clock frequency is high, the internal delay is small; all the control logic circuit is completed by the pure hardware, operating software, the process does not exist many inherent defects, fast and efficient.
  • 匿名
2013-05-23 12:23:18
FPGA high clock frequency, internal time delay from pure small; full control logic hardware circuit, there is no complete software that runs many inherent flaws in the process, high speed and high efficiency.
  • 匿名
2013-05-23 12:24:58
The FPGA clock frequency is high, the internal time delay is small; The completely control logic completes by the pure hardware electric circuit, does not have in the movement software process many inherent flaws, the speed is quick, the efficiency is high.
  • 匿名
2013-05-23 12:26:38
FPGA high clock frequency, the internal delay small all done by pure hardware circuit control logic, there is no running many inherent defects in the software process, high speed, high efficiency.
  • 匿名
2013-05-23 12:28:18
FPGA clock frequency is high, the inside delays time small; All control the logic to be finished by circuit of the pure hardware, does not store in operating a lot of inherent defects in software course, fast, high in efficiency.
 
 
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