|
关注：1
2013-05-23 12:21
求翻译：为充分利用现有的EDA实验条件，节省芯片和设计时间，虚线框内电路采用在EDA实验开发系统上实现是什么意思？ 待解决
 悬赏分：1
- 离问题结束还有
为充分利用现有的EDA实验条件，节省芯片和设计时间，虚线框内电路采用在EDA实验开发系统上实现
问题补充： |
|
2013-05-23 12:21:38
To take full advantage of existing EDA experimental conditions, saving design time and chip, circuit within the dashed box in EDA experimental development system to achieve
|
|
2013-05-23 12:23:18
In order to fully utilize the existing EDA experimental conditions, save chip and design-time in-circuit, dashed line box in EDA experimental development system used on achieving
|
|
2013-05-23 12:24:58
For the full use existing EDA experimental condition, saves the chip and the design time, the dashed line frame internal circuit uses at the EDA experiment develops on the system to realize
|
|
2013-05-23 12:26:38
In order to fully utilize the existing EDA experiment conditions, saving chip design time and, within a dotted box circuit implemented on EDA experiment and development system
|
|
2013-05-23 12:28:18
In order to fully utilize the existing EDA experiment conditions, saving chip design time and, within a dotted box circuit implemented on EDA experiment and development system
|
湖北省互联网违法和不良信息举报平台 | 网上有害信息举报专区 | 电信诈骗举报专区 | 涉历史虚无主义有害信息举报专区 | 涉企侵权举报专区
